MCS-202 Course Title : Computer Organisation Assignment Number : PGDCA(I)/202/Assignment/2024

Course Code : MCS-202
Course Title : Computer Organisation
Assignment Number : PGDCA(I)/202/Assignment/2024 Maximum Marks : 100
Last Dates for Submission : 30th April, 2024 (for January session)
31st October, 2024 (for July session)

There are four questions in this assignment, which carries 80 marks. The remaining 20 marks are for viva voce. You may use illustrations and diagrams to enhance the explanations. Please go through the guidelines regarding assignments given in the Programme Guide for the presentation format. The answer to each part of the question should be confined to about 300 words. Make suitable assumptions, if any.
Question 1: (covers Block1) (2 marks each × 10 parts =20 Marks)

(a) Explain the von Neumann architecture. Show how an instruction is executed by the von Neumann machine.
(b)Explain the main architectural differences between the von Neumann architecture and Harvard architecture with the help of a diagram of each.
(c) Perform the following conversion of numbers:
(i) Decimal (2536475891)10 to binary and hexadecimal.
(ii) Hexadecimal (FABCD1E)h to Octal.
(iii) String “ISO-8859-1 coding” to UTF 16.
(iv) Octal (23174560)O to Decimal

(d)Simplify the following function using K-map: F(A, B, C, D) = Σ (1, 3, 5, 7, 8, 12, 14, 15). Draw the circuit of the simplified function using NAND gates.

(e) Consider the Adder-Subtractor circuit given in Unit 3 of Block 1. Explain how this circuit will perform subtraction (A-B) if the value of A is 1010 and B is 1011. You must list all the bit values, including Cin and Cout and overflow condition.
(f) Explain the functioning of a 38 decoder. You should draw its truth table and explain its logic diagram with the help of an example input.

(g)Assume that a source data value 1001 was received at a destination as 1101. Show how Hamming’s Error-Correcting code will be appended to source data so this error of one bit is identified and corrected at the destination. You may assume that the transmission error occurs in the source data, not the error correction code.
(h)Explain the functioning of the SR flip-flop with the help of a logic diagram and characteristic table. Also, make and explain the excitation table of this flip-flop.

(i) Explain the functioning of a 3-bit ripple counter with the help of a diagram.

(j) Represent (-55.25)10 and (0.03125)10 in IEEE 754 single precision format.Question 2: (covers Block 2) (4 marks each × 5 parts =20 Marks)

(a) Explain the logic structure of SRAM and DRAM cells. How many RAM chips of size 256K  8 bits are needed to build a memory of size 16M Word RAM having a word size of 32 bits? Find the storage capacity of a disk with 16 recording surfaces and 32 tracks; each track has 64 sectors. You